Using the Build-in Vivado Simulator or QuestaSim or any other simulator is great for analyzing the RTL and verification of FSMs, signals flow, control and interfacing through I2C, SPI, AXI … Whats a little bit more tricky is the verification of DSP blocks, Filters,...
Petalinux is the Xilinx’s toolchain used for creating whole embedded Linux system for Xilinx devices. It is a convenient way of building all blocks necessary to create the bootable image for the targeted platform. But lets go to the very beginning. What you need for...
I have decided to create a small introduction to the concept of using fixed point representation in FPGA for DSP Operations. Because naturally in RTL design (VHDL, Verilog), there is no standard data format such as “integer or float”, but only logic vector...
Daylight Simulation Weather is among one of my hobbies and as such, I love to watch windy and various satellite images (Such as en.sat24.com ) as well as enjoying the rain and storms outside and eventually taking images. Unfortunately I don’t have the time to...
Back at the university, I got excited about one of the methods used for computing various quantities from electro magnetics. Particularly the method of finite differences, which is not among the widely used methods, but is somewhat simple to understand and compute...
